Tuesday 7 January 2020

Arduino MKR Vidor 4000

Intro

After the excitement of the Atlas-SoC I saw that Arduino have come up with similar hardware.  The Arduino MKR range provides low cost/power 32-bit micro-controllers.  The Vidor 4000 contains an Intel Cyclone 10 FPGA together with an Arm Cortex M0+ MCU.  So we have an Altera FPGA which we can program/configure with Quartus and a Microchip SAMD21 Arm processor which we can program with the Arduino IDE.  Arduino simplicity and the size of the user community should make this potentially widespread in its appeal.  It is also new in late 2018 so its use is just beginning to evolve. It is so exciting that I asked Harry to buy me one for Christmas.

Install

Getting Started is straightforward, as you would expect.  In board manager I needed to add SAMD beta boards then add the Vidor 4000 board in the Arduino IDE.  As usual I connected a microUSB cable to the PC and, after installing a driver, I was able to see the device and load a standard blink "hello world" program.  Next I downloaded VidorGraphics, VidorPeripherals libraries and could then try the Vidor specific examples. The first one of interest is to display an Arduino logo on an HDMI screen.  Initially this didn't work on my HDMI monitor but when I connected to a HDMI TV port it worked fine.

Familiarisation

The best explanation I have found for the Vidor 4000 is provided by Philippe at systemes-embarques.fr who also provides some tutorials.  Components on the card are:
  • ATSAMD21G18A microcontroller with 256 kB of Flash and 32 kB of RAM.
  • a Cyclone 10CL016 FPGA with 15408 logic elements, 504kbits of RAM and 56 multiplier 18 × 18.
  • a 16 Mbits FLASH SPI.
  • a 64 Mbits SDRAM (4M x 16 bits)
  • a NINA W102 WiFi / BLE module incorporating an ESP32 dual-core microcontroller.
  • an ATECC508A cryptographic chip improving the processing speed for secure connections.
  • MiniPCIe, USB, battery, I2C, MKR, MIPI for a camera, HDMI for video output connectors.

Most resources are attached to the FPGA but can be routed to SAMD21 or ESP32.

When Vidor is switched on MCU and ESP32 are initialised from non-volatile memory and the FPGA configuration is loaded from the Flash memory.

If you use Arduino IDE to upload the example "blink" sketch it is loaded via USB cable to MCU and run without touching FPGA.

If however you upload Examples>VidorPeripherals>VidorTestSketch one part of the .HEX file is loaded to MCU and the rest (app.ttf), is loaded via JTAG into FPGA and saved in SPI FLASH as shown in the diagram below.
When FPGA.begin() is executed on SAMD21 it enables FPGA clock, initialises JTAG port and sends a command to FPGA telling it load app.ttf from flash.  The JTAG port is used for subsequent MCU - FPGA intercommunication.




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